Job Id E1966096
Job Title SoC design verification engineer
Post Date 12/02/2018
Company - Division Qualcomm Atheros Inc - Qualcomm Atheros
Job Area Engineering - Hardware
Location China - Shanghai
Job Overview Digital Verification - Oversees verification for ASIC development for a variety of products. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Uses language such as System Verilog, C, PERL. Experience with UVM methodologies. Familiar with industry standard protocols and interfaces such as AXI, PCIE, SDCC, USB. The responsibilities of this role include: Develop verification platform Verification of SOC level design using random methodologies Test Planning, implementation and Execution. Work closely with design group to identify problems. Hand-on experience in all domains of complex ASIC DV flow from plan to coverage
Minimum Qualifications Bachelor's degree in Science, Engineering, or related field.
2+ years ASIC design, verification, or related work experience.
Preferred Qualifications Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering. 4+ years ASIC design, verification, or related work experience. 2+ years experience with architecture and design tools. 2+ years experience with scripting tools and programming languages. 2+ years experience with design verification methods.
Education Requirements Bachelor's degree in Science, Engineering, or related field.
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