Job Id E1969713
Job Title Senior SOC Design Engineer
Post Date 02/27/2019
Company - Division Qualcomm Atheros Inc - Qualcomm Atheros
Job Area Engineering - Hardware
Location China - Shanghai
Job Overview Take ownership of logic design, documentation and SoC integration. Interact with external IP teams/vendors to resolve all technical implementation and integration issues. Work closely with other Design/DV/Validation/SW teams for debug, support and chip bring-up. Work closely with STA and PD team for timing closure.
Minimum Qualifications Bachelor's degree in Science, Engineering, or related field.
2+ years ASIC design, verification, or related work experience.

Preferred Qualifications Familiar with ASIC development flows including logic design, RTL coding, verification, synthesis and timing closure. Past experience in one or more of the followings are highly preferred: Strong background in digital communication, CPU and networking protocols; Hands-on experience in WLAN/Wireless SoC design and good understanding of IEEE802.11 standard; Familiarity in advanced low-power SoC design techniques; Experiences with ARM/DSP, AHB/AXI bus, NoC and peripheral (PCIe/USB) development. Excellent teamwork, interpersonal and communication skills. Fluent in Chinese and English both verbal and written. Scripting/programming skill in C/C++, Tcl, Perl/Csh desired. Ability to work in stressful situations with tight schedules to meet.
Education Requirements NA
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